Introduction to Logic Synthesis Using Verilog HDL
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Publication
2006 - Morgan & Claypool Publishers
Language
English
Word Count
0 words, Guess
Page Count
0 pages
Identifiers
- ISBN-139781598291070
- ISBN-101598291076
- Better World Books9781598291070
- Open LibraryOL38360150M
Subjects
Other Editions
- Introduction to Logic Synthesis Using Verilog HDL
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