System-level design techniques for energy-efficient embedded systems

Description

System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.

Subjects

Other Editions

• System-level design techniques for energy-efficient embedded systemsKluwer Academic2004-01-01
• System-Level Design Techniques for Energy-Efficient Embedded SystemsHardcoverSpringer2003-12-31
• System-Level Design Techniques for Energy-Efficient Embedded SystemsSpringer London, Limited2006-01-01
• System-Level Design Techniques for Energy-Efficient Embedded SystemsPaperbackSpringer US2010-11-05