Logic-timing Simulation And the Degradation Delay Model
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Publication
2006-02-14 - Imperial College Press
Language
English
Word Count
66,750 words, Guess
Page Count
267 pages
Physical Format
Hardcover
Identifiers
- Open LibraryOL8628166M
- ISBN-139781860945892
- ISBN-101860945899
- OCLC Control Number64739465
- OCLC Control Numberlogictimingsimul00bell_255
and 3 more
- Library of Congress Control Number2007271541
- LibraryThing6363824
- Goodreads4083053
Classifications
- LCCTK7868.T5 B45 2006
First Sentence
The design process of VLSI integrated circuits has different options and many stages.
Subjects
Topics
Other Editions
- Logic-timing Simulation And the Degradation Delay Model
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