High performance processors

Innovative architecture for future generation high-performance processors and systems: [January, 2002, Hawaii]

edited by Alex Veidenbaum, Kazuki Joe ; [supported by, DARPA/ITO PAC/C Program]

Optimized ASIP Synthesis from Architecture Description Language Models

Oliver Schliebusch, Heinrich Meyr, Rainer Leupers

2000 International Conference on Computer Design (Iccd 2000): Vlsi in Computers and Processors, Conference Held 17-20 September 2000 - Austin, Texas (Ieee ... Conference on Computer Design//Proceedings)

IEEE Computer Society

Innovative architecture for future generation high-performance processors and systems: 18-19 January, 2001, Maui, Hawaii

edited by Alex Veidenbaum, Kazuki Joe ; sponsored by DARPA/ITO PAC/C Program, Maui High-Performance Computing Center.

High-performance system design: circuits and logic

edited by Vojin G. Oklobdzija.

Iwia 2005: Innovative Architecture for Future Generation High-Performance Processors and Systems

Alexandru Nicolau

Innovative Architecture (IWIA '97), 1997 International Workshop

Institute Of Electrical and Electronics Engineers, Hawaii) Generation High-Performance Processors and Systems (1997 : Maui, International Workshop on Innovative Architecture (1998 : Maui High-Performance Computing Center)

Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency (Lecture)

Kunle Olukotun

Export control implementation issues with respect to high-performance computers: hearing before Committee on Governmental Affairs, United States Senate, One Hundred Sixth Congress, second session, May 26, 2000.

United States. Congress. Senate. Committee on Governmental Affairs.

Innovative architecture for future generation high-performance processors and systems: 1999 International Workshop on Innovative Architecture (IWIA'99) : November 1-3, 1999, Maui, Hawaii

edited by Alex Veidenbaum and Hiroshi Nakashima ; sponsored by Maui High-Performance Computing Center.